The present invention relates to a semiconductor device enabling flip chip bonding, a method for manufacturing the same, and a semiconductor device-mounted structure.
As prior art concerning semiconductors enabling flip chip bonding, the semiconductor devices using an underfill are known as mentioned in JP-A-11-111768 (Prior Art 1). However, underfill is practiced for the purpose of preventing the break of connection part due to the strain caused by the heat generated in connection parts at the time of using a complete electric articles, and there is a problem that, when it is not practiced, the lifetime of connection of semiconductor devices becomes extremely short.
Prior arts enabling a flip chip connection without using underfill are disclosed in JP-A-11-54649 (Prior Art 2) and JP-A-11-354560 (Prior Art 3). The prior Art 2 discloses a semiconductor device comprising a semiconductor substrate on which semiconductor elements are disposed, element electrodes disposed on the main plane of said semiconductor substrate and electrically connected to said semiconductor elements, an elastic material layer formed on the main plane of said semiconductor substrate and made of an insulating elastic material, an opening part formed by removing at least a part of the elastic material layer so as to expose the element electrodes on the semiconductor substrate, a metallic wiring layer which continuously extends from upper part of the element electrode to the upper part of said elastic material layer, an external electrode provided on said elastic material layer as a part of said metallic wiring layer to realize an electrical connection to exterior instruments, and a surface protecting film covering said metallic wiring layer. It is also mentioned therein that said semiconductor substrate is in the state of a chip diced out from a wafer. Further, it is also mentioned therein that said elastic material layer (low elastic modulus layer) preferably has a thickness of 10-150 μm, and elastic modulus thereof (Young's modulus) is more preferably in the range of 10-1,000 kg/mm2, and coefficient of thermal expansion thereof is more preferably in the range of 10-100 ppm/° C. Further, it is also mentioned therein that the material constituting said elastic material layer may be a photosensitive insulating polymer film such as an ester-bonding type polyimide, acrylate type epoxy or the like, so long as the polymer film has a low elastic modulus and is insulating. Further, it is also mentioned that, when a non-photosensitive insulating film is used, the element electrodes on the semiconductor substrate can be exposed by a mechanical processing using laser or plasma or a chemical processing such as etching.
The descriptions in the Prior Art 3 are also similar to the above.
However, none of Prior Art 2 and Prior Art 3 gives a sufficient consideration to the prevention of break of wiring layer formed on the surface of elastic material layer (stress relaxation layer).